AI inference compilers are becoming release-qualified kernel systems
Modern inference speed increasingly comes from generated graphs, fused kernels, autotuned schedules and cached machine artifacts. That makes the compiler output part of the deployable product: it needs a precise hardware identity, numerical qualification, provenance, cold-start controls, performance acceptance and rollback—not just an impressive microbenchmark.
What is happening?
An AI compiler converts a model's high-level operations into code that matches a particular processor. It may fuse several operations, choose memory layouts, select vendor libraries, generate custom kernels and benchmark different schedules. The result can be much faster than ordinary eager execution, but it is not automatically portable or correct for every shape, dtype, device and software version. Production teams should treat the compiled result like a release artifact: record exactly how it was built, test it against the reference model, qualify real traffic shapes, sign and cache it, and keep a safe fallback.
Why this trend is moving
- 01LLM inference frameworks increasingly depend on generated or selected kernels for attention, normalization, quantization, MoE, communication and sampling.
- 02Ahead-of-time compilation and portable cache APIs are turning generated code into stored deployment artifacts rather than temporary process state.
- 03Dynamic shapes, graph breaks and recompilation policies can change latency and coverage even when the model weights are unchanged.
- 04New accelerators and numeric formats require backend-specific schedules, layouts and instructions that general graph optimization cannot infer uniformly.
- 05Autotuning can search thousands of candidate configurations, creating meaningful build cost and a need to preserve the winning configuration and evidence.
- 06Portable DSLs such as Triton, Helion, TileLang and CuTe DSL reduce authoring effort but do not eliminate hardware-specific performance and correctness qualification.
- 07Generated-kernel benchmarks and superoptimizers show growing automation while also exposing correctness, benchmark leakage and exploit risks.
What this means in practice
- Model weights alone no longer identify the executable system; the graph, compiler configuration, kernel registry, autotune results and hardware target matter.
- A cache hit is safe only when the model code, shapes, dtypes, compiler stack, backend flags and target device match the artifact's assumptions.
- Graph coverage and recompilation behavior must be measured under real sequence lengths, batches, adapters, multimodal inputs and structured-output paths.
- Kernel microbenchmarks must be connected to end-to-end accepted-task latency, throughput, memory and energy under the production scheduler.
- Generated and hand-written kernels require differential numerical tests, boundary-shape tests, race detection and device-specific regression suites.
- Autotuning is a build process with cost, non-determinism and supply-chain implications; winning schedules need reproducible provenance.
- Every compiled release needs an eager or previously qualified fallback when a guard fails, cache is invalid, device is unsupported or performance regresses.
What the headline leaves out
This is the practical technical view: how the system is put together, where it can fail, and what a real deployment asks from the team running it.
How it is built
A production compiler pipeline starts with a workload contract covering model revision, precision, shapes, sequence phases, adapters, attention modes, structured outputs, concurrency and target hardware. Graph capture records supported regions, breaks, guards and dynamic dimensions. A normalized intermediate representation preserves semantics while decomposition and fusion passes expose optimization opportunities. Backend selection routes operations among generated code, vendor libraries and qualified custom kernels. Autotuning searches schedules against representative shape buckets and stores both winner and measurement evidence. Ahead-of-time packaging binds graph, code, compiler versions, flags, hardware capability, kernel registry and cache keys into an immutable artifact. Differential numerical tests compare every path with a reference implementation across boundaries and adversarial shapes. End-to-end qualification measures warm and cold behavior under realistic traffic. Canary deployment monitors correctness, recompilation, cache misses and performance before promotion, with automatic fallback and complete rollback.
How inference behaves
Compilation begins by tracing or exporting executable graph regions and placing guards around assumptions such as tensor rank, shape, stride, dtype, device and control flow. Lowering converts framework operations into an IR, decomposes composites and applies algebraic, layout and fusion transformations. Code generation maps tiles and loops onto accelerator memory hierarchies, tensor units, warps, workgroups or CPU vectors. Autotuners vary block sizes, pipeline stages, warp counts, layouts and instruction choices, compiling and benchmarking candidates on the target. Runtime dispatch selects a cached specialization or more general kernel based on the request. The compiled artifact remains valid only while its guards, ABI, compiler, driver and hardware assumptions hold. Numerical verification must account for operation reordering, reduced precision, approximate functions and nondeterministic reductions.
What the tests can miss
A credible evaluation reports graph coverage, graph breaks, specialization count, cold compile time, warm startup time, cache hit rate, kernel correctness, numerical drift, kernel latency, end-to-end TTFT and token cadence, throughput, memory, energy, tail latency, fallback rate and complete cost per accepted task. Shape and feature matrices should include prefill, decode, mixed sequence lengths, continuous batching, adapters, multimodal encoders, quantized paths, structured output and distributed execution. Compare against the best eager or library-backed baseline, not an untuned default. Re-run after changes to model code, framework, compiler, kernel library, driver, firmware or hardware.
What deployment involves
Start by profiling a production-representative eager baseline and identifying a small number of expensive graph regions. Compile and qualify stable regions first, preserve explicit fallbacks and prebuild artifacts for known hardware. Introduce custom kernels only where generated code or vendor libraries miss a material bottleneck. Store artifacts in a content-addressed registry with build manifests, signatures and acceptance reports. Canary by hardware pool and traffic shape, monitoring cache misses, recompiles, numerical alarms and tail latency. Promote only when gains survive end-to-end traffic; retain previous artifact bundles and the eager path.
Where the risks sit
Compiled kernels execute privileged native code and belong in the software supply chain. Build in isolated workers, pin compiler and driver toolchains, verify source and dependency provenance, sign artifacts and restrict cache writes. Treat remote and shared caches as untrusted until digest, platform and manifest checks pass. Fuzz shapes, strides and dtypes; test out-of-bounds access, integer overflow, race conditions and resource exhaustion. Do not allow arbitrary model inputs to trigger uncontrolled compilation or autotuning in production. Keep generated source and logs free of secrets and tenant data.
What it really costs
Compiler economics include tracing, code generation, autotuning, build hardware, cache storage, cold starts, qualification, failed specializations, debugging, driver compatibility and operational fallback. A custom kernel that saves microseconds but requires per-device maintenance may cost more than a portable generated kernel. Conversely, a portable abstraction can hide a persistent performance gap on a high-volume shape. Use complete cost per accepted task and artifact reuse across the qualified fleet, including engineering and build costs, rather than peak TFLOPS or one kernel speedup.
What the evidence supports
The evidence shows a converging stack rather than one winning compiler. PyTorch combines graph capture, Inductor, Triton, AOT packaging, caching and provenance. vLLM builds serving-specific graph partitioning, shape specialization and caches around that stack. Triton, Helion, TileLang and CuTe DSL offer different levels of portability and hardware control. TensorRT-LLM and CUTLASS provide deeply optimized NVIDIA paths, while OpenXLA, StableHLO, MLIR, IREE and TVM emphasize portable intermediate representations and deployment. FlashInfer, SGLang kernels, DeepGEMM and other libraries preserve specialized implementations where general compilers lag. The operational conclusion is to govern the selected artifact and its qualification evidence, not to assume a DSL or compiler name guarantees performance or correctness.
How it works in practice
Inference compilation is a release-engineering discipline. A generated kernel is useful only when its graph assumptions, numerical behavior, performance envelope, compiler lineage and hardware target are qualified together and can be reproduced, observed and rolled back.
How the parts work together
The headline technology is only one part of the product. Reliability, security and cost are usually decided by the handoffs around it.
- 1
Workload contract
Freeze model revision, precision, features, shape distributions, concurrency, target devices, latency objectives and reference behavior.
- 2
Graph capture and guard map
Record compiled regions, graph breaks, dynamic dimensions, specialization guards and eager fallbacks under representative requests.
- 3
IR normalization and decomposition
Lower framework operations into versioned intermediate representations while preserving semantics and exposing fusion and layout choices.
- 4
Backend and kernel selection
Choose among generated code, vendor libraries and qualified custom kernels using explicit capability and shape constraints.
- 5
Autotuning and specialization
Search schedules on target hardware with controlled inputs, repeat measurements and retain winner, alternatives and tuning evidence.
- 6
Artifact packaging and provenance
Bind graph, code, toolchain, flags, cache keys, driver, firmware and hardware capability into a signed content-addressed release.
- 7
Numerical and memory safety qualification
Differentially test reference and compiled paths across boundary shapes, dtypes, layouts, concurrency and adversarial inputs.
- 8
End-to-end performance acceptance
Measure cold and warm startup, real scheduler behavior, tail latency, throughput, memory and energy across the traffic matrix.
- 9
Canary, fallback and rollback
Deploy by hardware pool, watch guard failures and drift, and automatically revert to a previously qualified artifact or eager path.
Estimate the limits before the demo
These equations are planning tools rather than substitutes for testing. They help expose a design that is unlikely to fit its hardware, budget, reliability or risk limits.
Realized compiled value
Realized value = graph coverage × qualified speedup × cache availability × traffic fit A very fast kernel creates little product value when it covers a small region, misses the cache or rarely matches production shapes.
- Report coverage by token phase and feature path.
- Weight speedup by observed traffic rather than uniform benchmark shapes.
Artifact reuse return
Reuse return = avoided compile and tune cost ÷ artifact build, validation, storage and invalidation cost Portable caches are valuable when identity rules are strict enough to prevent unsafe reuse and broad enough to avoid needless rebuilding.
- Separate local warm-cache benefit from cross-host artifact reuse.
- Include rebuilds caused by drivers, compiler upgrades and model code changes.
Complete cost per accepted task
Cost per accepted task = (build + tuning + runtime + qualification + fallback + maintenance) ÷ verified production tasks Peak kernel throughput omits compiler engineering, cold starts, failed specializations and maintenance across hardware generations.
- Include engineering and accelerator time used by autotuning.
- Compare with vendor-library and eager baselines under equal quality requirements.
The executable product is larger than the checkpoint
Two services can load identical weights and still execute materially different programs. Graph capture may choose different regions, decompositions can change, custom operators may be enabled or disabled, autotuning can select another schedule and a newer driver may generate different machine code. The release identity therefore includes the model, framework code, graph, compiler, kernel registry, flags, target architecture and cached artifacts.
This identity needs a manifest that can be compared and revoked. Content hashes should cover exported graphs, generated source or binaries, tuning records and relevant configuration. Hardware capability, driver and runtime ABI belong in the compatibility key. A human-readable release report should state which shapes and features were actually accepted.
Treating compilation as invisible process state creates irreproducible incidents. An operator needs to answer which kernel executed a failing request, why it was selected and which source graph operation produced it.
- Version graph and kernel artifacts independently from weights.
- Record compiler, runtime, driver and device capability.
- Make dispatch and fallback decisions observable.
- Retain a reproducible reference path.
Dynamic traffic turns guards into operational policy
Graph compilers specialize around assumptions. Batch size, sequence length, stride, dtype, adapter, multimodal branch and data-dependent control flow can create guards or graph breaks. When those assumptions fail, the runtime may recompile, dispatch another specialization or fall back to eager execution.
Production qualification should replay the actual shape distribution, not only one static prompt. Track graph coverage, break locations, guard failures, specialization count and cache growth. A dynamic kernel may reduce compilation storms but lose performance; many static kernels may be fast but expensive to build and cache.
Decide deliberately which dimensions remain dynamic, which are bucketed and which features bypass compilation. The policy should prevent a novel request from triggering expensive compilation in the serving path unless the service explicitly budgets for it.
- Profile prefill and decode separately.
- Include adapters, structured output and multimodal paths.
- Cap specialization growth and production recompilation.
- Test the fallback path as a first-class release.
Intermediate representations are compatibility contracts
Framework graphs are too high level for hardware scheduling, while machine instructions are too specific for model portability. Compiler stacks therefore use multiple intermediate representations to express tensor semantics, shapes, layouts, memory effects and target operations. Decomposition rewrites composite framework operations into forms the backend understands.
Every lowering can change the optimization space and expose correctness risk. A decomposition may enable fusion but alter numerical ordering. An unsupported custom operator may remain opaque and prevent neighboring fusion. A StableHLO or MLIR artifact can improve portability, yet downstream compiler and target versions still determine the final code.
Release evidence should preserve mappings from source operation to lowered graph and generated kernels. When a regression appears, engineers need to bisect the transformation pipeline rather than treating the compiler as one black box.
- Pin IR and opset versions.
- Test custom decompositions against reference semantics.
- Retain source-to-kernel provenance.
- Qualify downstream targets independently.
Fusion wins by changing memory traffic, not by removing names
Many inference operations are limited by moving tensors between high-bandwidth memory and on-chip storage rather than arithmetic. Fusing normalization, activation, quantization or residual work into a GEMM or attention kernel can avoid round trips and launch overhead. The benefit depends on tile compatibility, register pressure, shared-memory use and occupancy.
More fusion is not always better. A megakernel can increase compile time, reduce scheduling flexibility, exceed resource limits or perform poorly for variable shapes. Persistent kernels replace some hardware scheduling with software scheduling and can suffer load imbalance. The right fusion boundary is workload and architecture specific.
Measure bytes moved, launch count, occupancy and end-to-end latency. A microbenchmark that removes one kernel may not improve the service if the scheduler, communication or another operation becomes the bottleneck.
- Model the memory hierarchy explicitly.
- Compare fused and unfused paths across shapes.
- Watch register and shared-memory pressure.
- Evaluate scheduler flexibility and tail latency.
Portable DSLs move expertise; they do not abolish it
Triton, Helion, TileLang, CuTe DSL, Pallas and related systems let developers express tiled computation at different abstraction levels. They can reduce boilerplate, generate multiple backends and make autotuning accessible. The abstraction still exposes or encodes hardware facts such as memory spaces, tensor instructions, warp specialization and pipeline depth.
Performance portability means a kernel can be retuned or lowered across targets with acceptable effort—not that one schedule is optimal everywhere. Helion results, for example, can vary between H100 and B200 when the lower-level GEMM backend differs. TPU and GPU backends require different memory and execution models even when they share a high-level DSL.
Maintain a portable reference implementation and device-specific optimized implementations behind one semantic contract. Dispatch metadata should state supported dtypes, layouts, shapes and devices, with explicit priority and fallback.
- Separate semantic API from backend implementation.
- Qualify each architecture and compiler version.
- Keep portable fallbacks for unsupported shapes.
- Avoid hidden backend selection changes.
Autotuning is a build farm, not a magic flag
Kernel performance depends on choices such as tile size, warp count, pipeline stages, memory layout and instruction variant. Autotuners compile and benchmark candidate configurations on target hardware. For large shape sets, this can consume hours or days and produce substantial cache state.
Measurement noise, thermal state, clocking, background work and benchmark duration can select unstable winners. Use repeated trials, randomized order, warmups and confidence margins. Preserve the search space, candidate results, rejected errors and winning configuration so the artifact can be audited and rebuilt.
Shape specialization needs an economic limit. Tuning every observed dimension can explode build time and dispatch complexity. Cluster shapes by performance behavior, keep a robust general kernel and add specializations only where traffic-weighted gains justify maintenance.
- Tune on the deployment architecture.
- Store full measurement evidence.
- Use confidence margins, not single fastest runs.
- Budget specialization count and tuning time.
Generated code and custom libraries should compete under one contract
General compilers can fuse ordinary pointwise and reduction patterns, while vendor libraries and custom kernels often lead on GEMM, attention, MoE communication or new numeric formats. The production runtime needs a controlled way to choose among them without scattering model-specific conditionals throughout the codebase.
A kernel registry should express semantic operation, supported platform, dtype, layout, shape constraints, accuracy mode, priority and fallback. Generated kernels, CUTLASS paths, DeepGEMM, FlashInfer or SGLang kernels can then be selected through the same interface and test suite.
Replacement should be evidence-based. A custom kernel may outperform on one shape and regress another, or require a layout conversion that erases the gain. Evaluate the complete subgraph and end-to-end service before promoting it.
- Use one semantic test contract across backends.
- Account for layout-conversion overhead.
- Pin kernel package versions.
- Keep selection rules inspectable and reversible.
Compiler correctness includes acceptable numerical behavior
Graph rewrites and kernel fusion can reorder floating-point operations, replace exact functions with approximations or change reduction associativity. Reduced precision and device instructions add further differences. Bitwise equality is often unrealistic, but broad tolerances can hide real errors.
Create operation-aware tolerances and compare logits, selected tokens, probabilities and downstream task outputs. Cover zeros, infinities, NaNs, extreme values, unaligned sizes, empty tensors, maximum lengths, odd strides and concurrent execution. Repeated runs can expose races and nondeterminism.
For generated kernels, test memory safety and resource limits as well as numerics. Differential testing across eager, vendor and compiled paths helps localize whether the problem is in the model, decomposition, schedule or machine code.
- Define dtype- and operation-specific tolerances.
- Test boundary shapes and pathological values.
- Run repeated concurrency tests.
- Block promotion on unexplained token-level divergence.
Caches require identity, integrity and invalidation
Compilation caches can eliminate cold-start tracing, code generation and autotuning. They can also serve stale or incompatible native code if keys omit a relevant input. Safe keys include model and source code, compiler and backend configuration, shapes or guards, target architecture and software ABI.
Shared caches need content-addressing, signatures, write controls and quarantine. A cache entry from an untrusted builder is executable code. Store build logs and acceptance evidence beside the artifact, but keep tenant data and secrets out of traces and generated source.
Invalidation policy should be explicit. Framework, compiler, kernel library, driver, firmware and model updates may require rebuild or requalification. Measure cold-miss behavior so an empty cache does not create an outage.
- Sign and verify executable artifacts.
- Restrict cache writers.
- Test cold start and cache corruption.
- Define compatibility and revocation rules.
Compiler observability must reach the request trace
Operators need to know which compiled graph, specialization and kernel served a request. Trace metadata should include artifact ID, backend, shape bucket, guard outcome, cache status, compile time if any, fallback reason and key performance counters. Aggregate these by model, hardware pool and traffic class.
Canary deployments should compare numerical outputs and service metrics with the previous artifact. Watch recompilation spikes, cache misses, unexpected eager execution, tail-latency regressions, memory growth and device-specific errors. A compiler upgrade can improve average throughput while damaging one critical feature path.
Rollback should switch the complete artifact set, kernel registry and selection policy. Retain the reference eager path and the previous qualified bundle until production evidence is stable.
- Attach artifact IDs to inference traces.
- Alert on graph breaks and fallback growth.
- Canary by device and feature path.
- Rollback model, compiler artifacts and dispatch policy together.
What a benchmark worth believing should report
A performance number means little unless the workload, system configuration and quality bar are fixed. This is the minimum record a team should keep.
| Metric | How to measure it | Why it matters |
|---|---|---|
| Graph coverage | Share of production execution time inside qualified compiled regions | Kernel speedup cannot help code that remains eager. |
| Graph-break rate | Breaks per request by operation and feature path | Breaks add overhead and block fusion. |
| Specialization and recompile rate | New compiled variants and guard failures per traffic unit | Shows shape-policy stability and cache growth. |
| Cold compile and tune time | Wall time and accelerator time to produce the artifact | Build and startup cost affect availability and economics. |
| Warm startup time | Time to load validated cached artifacts and become ready | Measures operational value of packaging and cache reuse. |
| Cache hit and invalidation rate | Safe artifact reuse and rebuild frequency | Captures identity quality and fleet reuse. |
| Differential correctness | Agreement with reference across shapes, dtypes and features | Ensures optimization preserves accepted behavior. |
| Numerical drift | Logit, probability and output deltas by operation and dtype | Finds subtle precision and ordering regressions. |
| Kernel latency distribution | Median and tail latency for dominant kernels across shape buckets | Validates the local optimization envelope. |
| End-to-end latency | TTFT, inter-token cadence and request completion percentiles | Connects kernels to user-visible performance. |
| Throughput and goodput | Accepted tokens or tasks per second under SLO | Excludes work that violates quality or latency requirements. |
| Memory and capacity | Peak memory, workspace, cache footprint and sustainable concurrency | Faster kernels can reduce batch capacity through resource use. |
| Energy per accepted task | Measured device energy divided by verified output | Captures efficiency beyond latency. |
| Fallback and failure rate | Eager dispatch, unsupported features, crashes and timeouts | Shows release completeness and reliability. |
| Complete cost per accepted task | Build, tuning, serving and maintenance cost over accepted tasks | Supports realistic comparison among compiler and custom-kernel strategies. |
Four sensible deployment patterns
JIT regional compilation
- Where it fits
- Rapidly changing Python services with a few stable hot regions
- What you take on
- Low packaging effort but cold-start and runtime-guard complexity.
Ahead-of-time compiled artifact
- Where it fits
- Stable model releases, controlled shapes and non-Python or fast-start deployment
- What you take on
- Strong reproducibility but tighter compatibility and build requirements.
Portable DSL plus autotuned registry
- Where it fits
- Multi-silicon fleets requiring one semantic API with target-specific schedules
- What you take on
- Reduces source duplication while preserving per-device tuning cost.
Vendor library and custom-kernel portfolio
- Where it fits
- High-volume operations where architecture-specific performance justifies maintenance
- What you take on
- Peak performance with greater version, layout and platform coupling.
Megakernel or persistent-kernel path
- Where it fits
- Low-latency stable graphs where launch and inter-operator memory overhead dominate
- What you take on
- High fusion potential but difficult scheduling, compilation and fallback behavior.
Where projects usually go wrong
Checkpoint-only release identity
What you see: Identical weights behave differently across hosts
What to do: Manifest graph, compiler, kernel, driver and hardware identity.
Unbounded recompilation
What you see: Novel shapes trigger latency spikes and cache growth
What to do: Define dynamic dimensions, shape buckets and production compile limits.
Microbenchmark-only promotion
What you see: A kernel wins locally but end-to-end service regresses
What to do: Require traffic-weighted service acceptance.
Unsafe cache reuse
What you see: Artifacts built for another stack or device are loaded
What to do: Use content-addressed compatibility keys and signature verification.
Autotune noise winner
What you see: Selected schedules do not reproduce under steady load
What to do: Use repeated randomized measurements and confidence margins.
Over-fusion
What you see: Resource pressure, compile time or variable-shape performance worsens
What to do: Compare fusion boundaries and keep decomposed fallbacks.
Opaque custom operation
What you see: Graph fusion stops around a black-box operator
What to do: Provide decompositions or qualified custom kernels with explicit semantics.
Numerical tolerance too broad
What you see: Token or task regressions pass elementwise checks
What to do: Use operation-aware tolerances and output-level acceptance.
Hardware-specific schedule assumed portable
What you see: A kernel fast on one GPU loses on another
What to do: Tune and qualify each architecture separately.
Runtime compilation from untrusted inputs
What you see: Requests cause build storms or native-code exposure
What to do: Precompile qualified variants and restrict compilation workers.
Kernel package drift
What you see: Dispatch behavior changes after dependency upgrade
What to do: Pin registries and compare exact backend selection.
Cold-cache outage
What you see: Fleet restart causes simultaneous compilation and readiness delay
What to do: Prewarm artifacts and test empty-cache recovery.
Incomplete rollback
What you see: Weights roll back but incompatible compiled artifacts remain
What to do: Version and revert the complete serving bundle.
A checklist you can actually use
- Freeze the model and serving-feature contract.
- Capture real shape and traffic distributions.
- Establish the best eager or library baseline.
- Map compiled regions and graph breaks.
- Define dynamic dimensions and specialization buckets.
- Pin framework, compiler and backend versions.
- Version decompositions and custom operations.
- Maintain a semantic reference implementation.
- Choose generated, vendor or custom kernels per operation.
- Record supported dtypes, layouts, shapes and devices.
- Tune on each deployment architecture.
- Retain all autotune measurements and errors.
- Use repeat trials and confidence margins.
- Differentially test boundary and adversarial inputs.
- Measure output-level and task-level agreement.
- Test concurrency, races and nondeterminism.
- Package artifacts with content-addressed manifests.
- Sign artifacts and restrict cache writers.
- Verify cold-start and warm-cache readiness.
- Benchmark complete services under realistic scheduling.
- Measure memory, energy and tail latency.
- Attach artifact identity to request traces.
- Canary by hardware and feature path.
- Retain eager and previous-artifact rollback paths.
Terms worth knowing
- Graph capture
- Conversion of framework execution into a graph that a compiler can analyze and lower.
- Guard
- A runtime condition that must remain true for a compiled specialization to be valid.
- Graph break
- A boundary where execution leaves a compiled graph and returns to framework or eager code.
- Intermediate representation
- A compiler-level program form between framework operations and target machine code.
- Lowering
- Transformation from a higher-level operation or IR into a more target-specific representation.
- Decomposition
- Rewrite of a composite operation into simpler operations understood by the compiler.
- Kernel fusion
- Combination of operations into one kernel to reduce launches or memory traffic.
- Autotuning
- Empirical search over schedules and configurations on target hardware.
- Shape specialization
- Generation of code optimized for a defined tensor-shape range or exact shape.
- AOT artifact
- Code and metadata compiled before service startup and packaged for deployment.
- JIT compilation
- Compilation performed during or shortly before program execution.
- Kernel registry
- Catalog mapping semantic operations and constraints to available implementations.
- Performance portability
- Ability to achieve acceptable performance across targets with limited source duplication and retuning.
- Megakernel
- A persistent or highly fused kernel executing multiple operations or a large graph region.
- Numerical drift
- Output difference caused by precision, ordering, approximations or nondeterminism.
- Artifact provenance
- Evidence linking compiled code to source graph, toolchain, configuration, target and validation.
Primary references and technical starting points
These sources support the architecture, runtime, benchmark and security claims. Vendor capabilities can change, so the article records the distinction between established evidence, measured product behavior and editorial interpretation.
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- 02 PyTorch torch.compile programming modeldocs.pytorch.org
- 03 PyTorch dynamic shapesdocs.pytorch.org
- 04 PyTorch recompilation guidancedocs.pytorch.org
- 05 PyTorch torch.compile troubleshootingdocs.pytorch.org
- 06 PyTorch compile-time caching tutorialdocs.pytorch.org
- 07 PyTorch compile-cache configurationdocs.pytorch.org
- 08 PyTorch AOTInductordocs.pytorch.org
- 09 PyTorch ahead-of-time torch.compiledocs.pytorch.org
- 10 PyTorch Inductor provenance trackingdocs.pytorch.org
- 11 PyTorch 2.7 releasepytorch.org
- 12 PyTorch 2.9 releasepytorch.org
- 13 PyTorch Helion projectpytorch.org
- 14 Helion repositorygithub.com
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- 16 Accelerating autotuning in Helionpytorch.org
- 17 LLM-guided Helion autotuningpytorch.org
- 18 TokenSpeed-Kernel portable multi-silicon kernelspytorch.org
- 19 Portable vLLM inference kernels in Helionpytorch.org
- 20 Fusing normalization into GEMM and attention kernelspytorch.org
- 21 Helion on TPUpytorch.org
- 22 Triton language and compiler paperarxiv.org
- 23 Triton repositorygithub.com
- 24 Triton tutorialstriton-lang.org
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- 26 Triton fused softmax tutorialtriton-lang.org
- 27 Triton layer normalization tutorialtriton-lang.org
- 28 Triton fused attention tutorialtriton-lang.org
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- 30 Triton persistent matmul tutorialtriton-lang.org
- 31 Triton block-scaled matmul tutorialtriton-lang.org
- 32 vLLM torch.compile integrationdocs.vllm.ai
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- 34 vLLM CustomOp designdocs.vllm.ai
- 35 vLLM repositorygithub.com
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- 37 FlashInfer repositorygithub.com
- 38 FlashInfer paperarxiv.org
- 39 SGLang repositorygithub.com
- 40 SGLang documentationdocs.sglang.io
- 41 SGLang kernel sourcegithub.com
- 42 NVIDIA TensorRT-LLM documentationdocs.nvidia.com
- 43 NVIDIA TensorRT-LLM repositorygithub.com
- 44 TensorRT-LLM architecture overviewnvidia.github.io
- 45 NVIDIA CUTLASS documentationnvidia.github.io
- 46 NVIDIA CUTLASS repositorygithub.com
- 47 NVIDIA CuTe DSLdocs.nvidia.com
- 48 NVIDIA CUDA C++ programming guidedocs.nvidia.com
- 49 NVIDIA cuBLAS documentationdocs.nvidia.com
- 50 OpenXLA projectopenxla.org
- 51 StableHLO specificationopenxla.org
- 52 StableHLO compatibilityopenxla.org
- 53 OpenXLA XLA repositorygithub.com
- 54 MLIR documentationmlir.llvm.org
- 55 MLIR compiler infrastructure paperarxiv.org
- 56 IREE documentationiree.dev
- 57 IREE deployment configurationsiree.dev
- 58 IREE repositorygithub.com
- 59 JAX Pallas kernel languagedocs.jax.dev
- 60 Apache TVM documentationtvm.apache.org
- 61 TVM end-to-end optimizing compiler paperarxiv.org
- 62 Ansor auto-scheduler paperarxiv.org
- 63 MLC LLM documentationllm.mlc.ai
- 64 MLC LLM repositorygithub.com
- 65 TensorIR paperarxiv.org
- 66 MetaSchedule paperarxiv.org
- 67 FlashAttention paperarxiv.org
- 68 FlashAttention-2 paperarxiv.org
- 69 FlashAttention-3 paperarxiv.org
- 70 PyTorch FlexAttentionpytorch.org
- 71 TileLang paperarxiv.org
- 72 TileLang repositorygithub.com
- 73 DeepGEMM repositorygithub.com
- 74 BitBLAS repositorygithub.com
- 75 ROCm Composable Kernel repositorygithub.com
- 76 oneDNN Graph programming modeluxlfoundation.github.io
- 77 OpenVINO documentationdocs.openvino.ai
- 78 KernelBench paperarxiv.org
- 79 Mirage multi-level superoptimizerusenix.org
- 80 Mirage Persistent Kernelusenix.org